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Research Project: High Speed CMOS: High Speed CMOS AD-converters
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2011

Louwsma, S.M. and Vertregt, M. (2011) Circuit with a successive approximation analog to digital converter. Patent US7973693 (Assigned).
Louwsma, S.M. and Vertregt, M. (2011) Signal sampling circuit. Patent US8035539 (Assigned).

2010

Louwsma, S.M. and van Tuijl, A.J.M. and Nauta, B. (2010) Time-Interleaved Analog to Digital Converters. Springer, Dordrecht. ISBN 978-90-481-9715-6
Louwsma, S.M. and Vertregt, M. (2010) Signal sampling circuit. Patent US20080677010 (Application).
Louwsma, S.M. and Vertregt, M. (2010) Time-interleaved track and hold. Patent EP20080807576 (Assigned).
Louwsma, S.M. and Vertregt, M. (2010) Circuit with a successive approximation analog to digital converter. Patent US20080601086 (Application).

2009

Louwsma, S.M. (2009) Time-interleaved Analog-to-Digital Converters. PhD thesis, University of Twente. CTIT Ph.D.-thesis series No. 09-158 ISBN 978-90-365-2944-0

2008

Louwsma, S.M. and van Tuijl, A.J.M. and Vertregt, M. and Nauta, B. (2008) A 1.35 GS/s, 10b, 175 mW Time-Interleaved AD Converter in 0.13 µm CMOS. IEEE journal of solid-state circuits, 43 (4). pp. 778-786. ISSN 0018-9200 *** ISI Impact 3,299 ***

2007

Louwsma, S.M. and van Tuijl, A.J.M. and Vertregt, M. and Nauta, B. (2007) A 1.35 GS/s, 10b, 175 mW time-interleaved AD converter in 0.13 µm CMOS. In: 2007 Symposium on VLSI Circuits, 12-16 Jun 2007, Kyoto, Japan. pp. 62-63. IEEE Press. ISBN 978-4-900784-04-8
Louwsma, S.M. and van Tuijl, A.J.M. and Vertregt, M. and Nauta, B. (2007) A Time-Interleaved Track & Hold in 0.13μm CMOS sub-sampling a 4 GHz Signal with 43dB SNDR. In: Proceedings of the CICC, 16-19 sept 2007, San Jose, CA USA. pp. 329-332. IEEE Press. ISBN 978-1-4244-1623-3