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Hollestelle, G. and Burgers, W. and den Hartog, J.I.
(2004)
Power analysis on smartcard algorithms using simulation.
Technical report CSR 04-22,
Eindhoven University of Technology, Eindhoven.
Full text available as: Official URL: http://library.tue.nl/catalog/LinkToVubis.csp?language=dut&DataBib=6:580553 AbstractThis paper presents the results from a power analysis of the AES and RSA algorithms by
simulation using the PINPAS tool. The PINPAS tool is capable of simulating the power
consumption of assembler programs implemented in, amongst others, Hitachi H8/300
assembler. The Hitachi H8/300 is a popular CPU for smartcards. Using the PINPAS tool, the
vulnerability for power analysis attacks of straightforward AES and RSA implementations is
examined. In case a vulnerability is found countermeasures are added to the implementation
that attempt to counter power analysis attacks. After these modifications the analysis is
performed again and the new results are compared to the original results. | Item Type: | Internal Report (Technical report) |
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| Research Group: | EWI-DIES: Distributed and Embedded Security |
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| Research Program: | CTIT-ISTRICE: Integrated Security and Privacy in a Networked World |
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| Research Project: | PINPASJC: Program Inferred Power Analysis in Software -- JavaCard |
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| Additional Information: | Imported from DIES |
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| ID Code: | 798 |
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| Deposited On: | 12 December 2005 |
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| Refereed: | No |
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| More Information: | statistics |
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