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713 Architecture Design Space Exploration for Streaming Applications Through Timing Analysis

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Wiggers, M.H. and Kavaldjiev, N.K. and Smit, G.J.M. and Jansen, P.G. (2005) Architecture Design Space Exploration for Streaming Applications Through Timing Analysis. In: Communicating Process Architectures 2005 (WoTUG-28), Eindhoven, The Netherlands. pp. 219-233. IOS Press. ISBN 1-58603-561-4

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Abstract

We compare the maximum achievable throughput of different memory organisations of the processing elements that constitute a multiprocessor system on chip. This is done by modelling the mapping of a task with input and output channels on a processing element as a homogeneous synchronous dataflow graph, and use maximum cycle mean analysis to derive the throughput. In a HiperLAN $\2$ case study we show how these techniques can be used to derive the required clock frequency and communication latencies in order to meet the applications throughput requirement on a multiprocessor system on chip that has one of the investigated memory organisations.

Item Type:	Conference or Workshop Paper (Proceedings UNSPECIFIED, Presentation Type UNSPECIFIED)
Research Group:	EWI-DIES: Distributed and Embedded Security, EWI-CAES: Computer Architecture for Embedded Systems
Research Program:	CTIT-UBRICKS: Building Blocks for Ubiquitous Computing and Communication
Research Project:	Gecko: Communication and Scheduling in Reconfigurable Multimedia
Additional Information:	Imported from DIES
ID Code:	713
Status:	Published
Deposited On:	12 December 2005
Refereed:	Yes
International:	Yes
More Information:	statistics metis

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