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27026 HAPI: An event-driven simulator for real-time multiprocessor systems
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Kurtin, P. and Hausmans, J.P.H.M. and Bekooij, M.J.G. (2016) HAPI: An event-driven simulator for real-time multiprocessor systems. In: 2016 ACM International Workshop on Software and Compilers for Embedded Systems (SCOPES), 23-25 May 2016, Sankt Goar, Germany. pp. 60-66. ACM. ISBN 978-1-4503-4320-6

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Official URL: http://dx.doi.org/10.1145/2906363.2906381

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Abstract

Many embedded multiprocessor systems have hard real-time requirements which should be guaranteed at design time by means of analytical techniques that cover all cases. It is desirable to evaluate the correctness and tightness of the analysis results by means of simulation. However, verification of the analytically obtained results is hampered by the lack of a fast high level simulation approach that supports task scheduling and that does not produce pessimistic simulation traces.

In this paper we present HAPI, an event driven simulator for the evaluation of the results of real-time analysis techniques for task graphs executed on multiprocessor systems that support processor sharing. HAPI produces simulation traces that are pessimistic to reality and optimistic to temporal analysis. It can be consequently used to detect optimistic, i.e. incorrect, analysis results.

Several task scheduling policies are supported by HAPI such as fixed priority preemptive, time-division multiplex and round-robin. Preemptive task scheduling decisions are simulated which enables to study the cause of delayed task finishes and thereby helps to identify overly pessimistic analysis results.

We demonstrate the applicability of the simulator using a number of didactic examples and a WLAN 802.11p application.

Item Type:Conference or Workshop Paper (Full Paper, Talk)
Research Group:EWI-CAES: Computer Architecture for Embedded Systems
Research Program:CTIT-General
Research Project:CPS-CD: Robust design of cyber-physical systems
Uncontrolled Keywords:Simulation, Temporal Analysis, Refinement, Abstraction, Verification, Falsification, Stream Processing, Real Time, Temporal Guarantees, Multiprocessor, MPSoC, Dataflow, Scheduling, Processor Sharing, SystemC
ID Code:27026
Status:Published
Deposited On:11 November 2016
Refereed:Yes
International:Yes
More Information:statisticsmetis

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