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Kerkhoff, H.G. and Ebrahimi, H. (2015) Intermittent resistive faults in digital cmos circuits. In: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2015, 22-24 April 2015, Belgrade, Serbia. pp. 211-216. IEEE Circuits & Systems Society. ISBN 978-1-4799-6779-7
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Official URL: http://dx.doi.org/10.1109/DDECS.2015.12
A major threat in extremely dependable high-end process node integrated systems in e.g. Avionics are no failures found (NFF). One category of NFFs is the intermittent resistive fault, often originating from bad (e.g. Via or TSV-based) interconnections. This paper will show the impact of these faults on the behavior of a digital CMOS circuit via simulation. As the occurrence rate of this kind of defects can take e.g. One month, while the duration of the defect can be as short as 50 nanoseconds, to evoke and detect these faults is a huge scientific challenge. An on-chip data logging system with time stamp and stored environmental conditions, along with the detection, will drastically improve the task of maintenance of avionics and reduce the current high debugging costs.
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