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24712 Temporal analysis model extraction for optimizing modal multi-rate stream processing applications
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Geuns, S.J. and Hausmans, J.P.H.M. and Bekooij, M.J.G. (2014) Temporal analysis model extraction for optimizing modal multi-rate stream processing applications. In: Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2014), 10-11 Jun 2014, St. Goar, Germany. pp. 21-39. ACM. ISBN 978-1-4503-2941-5

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Modern real-time stream processing applications, such as Software Defined Radio (SDR) applications, typically have multiple modes and multi-rate behavior. Modes are often described using while-loops whereas multi-rate behavior is frequently described using arrays with pseudo-random indexing patterns. The temporal properties of these applications have to be analyzed in order to determine whether optimizations improve throughput. However, no method exists in which a temporal analysis model is derived from these applications that is suitable for temporal analysis and optimization.

In this paper an approach is presented in which a concurrency model for the temporal analysis and optimization of stream processing applications is automatically extracted from a parallelized sequential application. With this model it can be determined whether a program transformation improves the worst-case temporal behavior. The key feature of the presented approach is that arrays with arbitrary indexing patterns can be described, allowing the description of multi-rate behavior, while still supporting the description of modes using while-loops. In the model, an over-approximation of the synchronization dependencies is used in case of arrays with pseudo-random indexing patterns. Despite the use of this approximation, we show that deadlock is only concluded from the model if there is also deadlock in the parallelized application. The relevance and applicability of the presented approach are demonstrated using an Orthogonal Frequency-Division Multiplexing (OFDM) transmitter application.

Item Type:Conference or Workshop Paper (Full Paper, Talk)
Research Group:EWI-CAES: Computer Architecture for Embedded Systems
Research Program:CTIT-DSN: Dependable Systems and Networks
Research Project:NEST: Netherlands Streaming Reconfigurable digital antenna processor
ID Code:24712
Deposited On:03 July 2014
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