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1532 Exploring Energy-Efficient Reconfigurable Architectures for DSP Algorithms
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Heysters, P.M. and Smit, J. and Smit, G.J.M. and Havinga, P.J.M. (2000) Exploring Energy-Efficient Reconfigurable Architectures for DSP Algorithms. In: 1st PROGRESS workshop on Embedded Systems. pp. 107-112. ISBN 90-73461-25-1

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Abstract

Future hand-held multimedia terminals require a very high performance on a very small energy budged. Such devices can only be realized if their entire system is energy cognisant. In this paper a reconfigurable systems-architecture for mobile multimedia systems is introduced. The Field Programmable Function Array (FPFA) is discussed in detail. Several digital signal processing algorithms are discussed and mapped on the FPFA. Also,the power radius theory about low-power design is introduced.

Item Type:Conference or Workshop Paper (Full Paper, Talk)
Research Group:EWI-CAES: Computer Architecture for Embedded Systems
Research Program:CTIT-UBRICKS: Building Blocks for Ubiquitous Computing and Communication
Additional Information:Imported from CHAMELEON.xml
ID Code:1532
Status:Published
Deposited On:17 February 2006
Refereed:Yes
International:No
More Information:statistics

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