EEMCS

Full text available as:

PDF - Requires a PDF viewer such as GSview, Xpdf or Adobe Acrobat Reader 1435 Kb

Official URL: http://dx.doi.org/10.1109/TCSI.2008.925815

Abstract

Abstract—In this paper, an in-depth analysis of switched-resistor
(S-R) techniques for implementing low-voltage low-distortion tunable
active-RC filters is presented. The S-R techniques make use of
switch(es) with duty-cycle-controlled clock(s) to achieve tunability
of the effective resistance and, hence, the RC time constant. The
characteristics of two S-R networks utilizing one set (S-1R) and
two sets (S-2R) of switch and resistor combinations are analyzed.
It will be shown that the S-2R network outperforms the S-1R counterpart
in terms of finite-slew-rate-induced distortion, frequency
translation, and noise performance. In order to extend the tuning
range, an S-R bank scheme is also described. The theoretical analysis
was verified by an experiment on a 100-kHz first-order S-R
filter prototype, implemented using discrete elements, where several
advantages of the S-2R over the S-1R networks are demonstrated.
Simulations of 10-MHz low-pass filters based on the S-1R
and S-2R techniques in a standard 0.18- mCMOSprocess are also
included for performance comparison in practical on-chip filter
implementations.

Export this item as:

• BibTeX
• XML

To correct this item please ask your editor

Repository Staff Only: edit this item